(Not a) good explanation of jitter in TAS
Reply #110 – 2009-07-30 21:17:18
There's no reason for a standard DAC to have a crystal. The device sending the digital data either provides a separate but parallel clock signal, or the clock is derived from the input digital data stream. The latter is far and away the most common situation. The reason for adding a crystal is to achieve low-jitter performance at frequencies that exceed the cut-off frequency of the clock-recovery PLL. The crystal is usually a VCXO (voltage controlled crystal oscillator) that is being controlled by a PLL. The PLL includes a phase comparator and a low pass filter. Above the cut off frequency of the low-pass filter, the jitter performance is determined by the stability of the oscillator. Below the cut-off frequency of the low-pass filter, the jitter performance is determined by the quality of the clock embedded in the digital input signal (AES or S/PDIF). The crystal oscillator makes it much easier to achieve low-jitter performance above the PLL cut-off frequency. The stability of the oscillator is especially important when the PLL cut-off frequency is very low (less than 100 Hz). Low cut-off frequencies are required to eliminate low-frequency jitter, so this makes the use of a VCXO a great solution. But the VCXO solution is not cheap. To cut costs, the VCXO is often omitted, and the clock recovered by the digital audio receiver is simply wired directly to the D/A converter. This is not good practice, but it is very common (and very inexpensive).If you see a crystal in a DAC, either the DAC resamples asynchronously, or the crystal is actually there for the benefit of the ADC that is in the same box. VCXOs and crystal oscillators look identical. It is impossible to tell the difference without looking up data sheets on the oscillators. If the crystal is fixed-frequency, this may be an indication that the DAC resamples asynchronously. Some ASRC (asynchronous sample rate converter) ICs attenuate jitter, but most do not. Most of the ASRC ICs we have tested have very little jitter attenuation below 5 kHz. There are 3 or 4 ASRC ICs that have outstanding jitter attenuation that extends down to a few Hz and these few can outperform two-stage PLL solutions that employ VCXOs.Asynchronous resampling has to violate the principle of bit-perfect data transmission. Very true, but the quality of the ASRC is a function of how much DSP horsepower we are willing to expend. The distortion artifacts of the better ASRC devices are below -140dB. These distortion artifacts are as much as 100 dB lower than the jitter-induced sidebands produced by DACs that do not use a VCXO or a fixed-frequency crystal.