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Topic: Another HDCD thread... (Read 5622 times) previous topic - next topic
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Re: Another HDCD thread...

Reply #25
In this case a software decoder needs decode to a higher sample rate (e.g. 2x) for the transient filter to work.
To mimick the oversampling in the DAC?
Pacific's HDCD decoder defaults to 8x oversampling, it seems: http://tech.juaneda.com/download/PMD100.pdf

Re: Another HDCD thread...

Reply #26
Many DAC chips apply filters in cascaded form (e.g. 2x2x2). For example, if the input is 88.2/96k one filter stage would be skipped, so only 2x2 and 176.4/192k would be x2.

Because typical DAC chips still oversample when receiving 88.2k input, a software decoder only needs 2x to justify the minimum required implementation of the transient filter.

Modern chips usually work in this way:
input -> 8-16x FIR filter -> 64-1024x lower quality filter (e.g. ZOH, LERP) -> modulator -> DAC -> analog filter -> output

 

Re: Another HDCD thread...

Reply #27
Looks like I can make a 20-bit file with SoX.

Code: [Select]
sox input_hdcd.flac -b 24 output_20b.flac dither -p 20
This means dither to 20 bits, because SoX uses a traditional approach (contrast to e.g. Case's smart dither), the LSBs will always be filled, even when the input is digital silence (all zero).
The commands below truncate any 24-bit input file to 17-23 bits without dither. Try to compare file size between HDCD decodes and normal 24-bit files. -D disables automatic dither. SoX by default applies no dither if output bit-depth >= 24, but IIRC a 3rd party compile I used still dither with 24-bit output.
Code: [Select]
sox 24bit.flac 17bit.flac" -D vol 3.0517578125e-5 vol 32768 stats
sox 24bit.flac 18bit.flac" -D vol 6.103515625e-5 vol 16384 stats
sox 24bit.flac 19bit.flac" -D vol 1.220703125e-4 vol 8192 stats
sox 24bit.flac 20bit.flac" -D vol 2.44140625e-4 vol 4096 stats
sox 24bit.flac 21bit.flac" -D vol 4.8828125e-4 vol 2048 stats
sox 24bit.flac 22bit.flac" -D vol 9.765625e-4 vol 1024 stats
sox 24bit.flac 23bit.flac" -D vol 1.953125e-3 vol 512 stats

All software decoders we have today can only do up to 223, but not 224.
https://patentimages.storage.googleapis.com/4f/ea/aa/7bb5490b83807a/US5479168.pdf
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Quote
The data signal then goes to delay module  222, which gives the control decode module 221 time to figure out what to do with the signal before it gets to the first DSP subsystem 223. The first DSP module 223 is the complement to module 210 in the encoder. It does a peak expansion which restores the peaks limited in 210. It does a low level gain expansion, restoring the low level dynamics compressed in 210. It can complement the low level forcing of high frequencies in the dynamic dither operation, restoring a flat frequency response and lowering quantization noise. It performs some house keeping functions, and its signal output has 18 to 20 bits of real information at the one-times sampling rate (44.1 kHz for CD).

This more accurate digital signal at the media sampling rate is routed to the second digital signal processor sub system 224, which is complementary to encode module 205. In this subsystem, the signal is interpolated to a higher sampling rate using a variety of smoothing filters which are chosen to complement the decimation filters in 205.